Lecture 1 - Evolution of Computer Systems Lecture 2 - Basic Operation of a Computer Lecture 3 - Memory Addressing and Languages Lecture 4 - Software and Architecture Types Lecture 5 - Instruction Set Architecture Lecture 6 - Number Representation Lecture 7 - Instruction Format and Addressing Modes Lecture 8 - CISC and RISC Architecture Lecture 9 - MIPS32 Instruction Set Lecture 10 - MIPS Programming Examples Lecture 11 - Spim – A Mips32 Simulator Lecture 12 - Measuring Cpu Performance Lecture 13 - Choice Of Benchmarks Lecture 14 - Summarizing Performance Results Lecture 15 - Amadahl’s Law - Part 1 Lecture 16 - Amadahl’s Law - Part 2 Lecture 17 - Design Of Control Unit - Part 1 Lecture 18 - Design Of Control Unit - Part 2 Lecture 19 - Design Of Control Unit - Part 3 Lecture 20 - Design Of Control Unit - Part 4 Lecture 21 - Mips Implementation - Part 1 Lecture 22 - Mips Implementation - Part 2 Lecture 23 - Processor Memory Interaction Lecture 24 - Static And Dynamic Ram Lecture 25 - Asynchronous Dram Lecture 26 - Synchronous Dram Lecture 27 - Memory Interfacing And Addressing Lecture 28 - Memory Hierarchy Design - Part 1 Lecture 29 - Memory Hierarchy Design - Part 2 Lecture 30 - Cache Memory - Part 1 Lecture 31 - Cache Memory - Part 2 Lecture 32 - Improving Cache Performance Lecture 33 - Design Of Adders - Part 1 Lecture 34 - Design Of Adders - Part 2 Lecture 35 - Design Of Multipliers - Part 1 Lecture 36 - Design Of Multipliers - Part 2 Lecture 37 - Design Of Dividers Lecture 38 - Floating-Point Numbers Lecture 39 - Floating-Point Arithmetic Lecture 40 - Basic Pipelining Concepts Lecture 41 - Pipeline Scheduling Lecture 42 - Arithmetic Pipeline Lecture 43 - Secondary Storage Devices Lecture 44 - Input-Output Organization Lecture 45 - Data Transfer Techniques Lecture 46 - Interrupt Handling - Part 1 Lecture 47 - Interrupt Handling - Part 2 Lecture 48 - Direct Memory Access Lecture 49 - Some Example Device Interfacing Lecture 50 - Exercises On I/O Transfer Lecture 51 - Bus Standards Lecture 52 - Bus Standards Lecture 53 - Pipelining The Mips32 Data Path Lecture 54 - Mips Pipeline (Continued... Lecture 55 - Pipeline Hazards - Part 1 Lecture 56 - Pipeline Hazards - Part 2 Lecture 57 - Pipeline Hazards - Part 3 Lecture 58 - Pipeline Hazards - Part 4 Lecture 59 - Multicycle Operations In Mips32 Lecture 60 - Exploiting Instruction Level Parallelism Lecture 61 - Vector Processors Lecture 62 - Multi-Core Processors Lecture 63 - Some Case Studies Lecture 64 - Summarization Of The Course